FIG. 1 illustrates a cross-sectional view of a conventional extended drain metal oxide semiconductor field effect transistor (EDMOSFET). Generally, a MOS comprises a gate region 80, a source region 90, and a drain region 95. The MOS transistor 1 of this exemplary representation is disposed upon a substrate 10 having a deep n-type well 25 disposed along the substrate 10. The substrate 10 may be a p-type substrate or p-type backgate for an n-channel MOS (nMOS) transistor or an n-type substrate or n-type backgate for a p-channel MOS (pMOS) transistor.
A p-type well 30 is disposed in the deep n-type well 25 at the source region 90. A p doped source region 35 and an n doped source region 40 are disposed in the p-type well 30 and define a contact area for the source region 90. An n doped drain region 45 defines a contact area for the drain region 95. A dielectric layer 50 that may be a field oxide layer defines the bounds of the contact area for the drain region 95 and the contact area for the source region 90. A conductive layer 70 that may be a polysilicon layer is disposed across a portion of the dielectric layer 50 and the gate oxide layer 60.
The MOS transistor has three modes of operation depending upon the terminal voltages. For example, a MOS transistor has terminal voltages Vg (gate terminal voltage), Vs (source terminal voltage), and Vd (drain terminal voltage). The nMOS operates in a cutoff mode when a bias voltage Vgs between the gate and the source is less than the threshold voltage Vth of the MOS transistor. Essentially, in the cutoff mode, no channel develops and the current Ids in the channel region is zero.
The nMOS operates in a linear mode when the bias voltage Vgs exceeds the threshold voltage Vth as long as a channel voltage Vds does not exceed a saturation voltage Vds,sat. Typically, the saturation voltage is defined as the bias voltage Vgs less the threshold voltage Vth. The current Ids increases with the channel voltage Vds when the nMOS is in the linear mode. Finally, the channel pinches off and the current saturates when the channel voltage Vds exceeds the saturation voltage Vds,sat. Ids is independent of Vds when the nMOS transistor is in this saturation mode.
An extended drain metal oxide semiconductor field effect transistor (EDMOSFET) transistor is characterized by a relative high specific on resistance (RON) especially in comparison to a laterally diffused metal oxide semiconductor field effect transistor (LDMOSFET). However, the EDMOSFET is characterized as having a reduced number of mask layers over the LDMOSFET. Conventionally, the breakdown voltage of the EDMOSFET and LDMOSFET have been increased by reducing the concentration of dopant in the drift region, which is compensated for by increasing the length of the drift region. This results in an increase in the RON.
Thus, without intending to be limiting, conventionally the current of MOS transistors may depend upon the type of dopant and the extent of doping in any of the regions of the semiconductor, the dielectric thickness and the dielectric material, and the gate material. Moreover, as disclosed herein, conventional changes in the design of the MOS transistor that increase the breakdown voltage also increase the RON. There remains a need in the art for a MOS design that increases the breakdown voltage but without substantially affecting the RON of the MOS transistor. Conversely, there remains a need in the art to reduce the RON without substantially changing a desired breakdown voltage of the MOS transistor.
Further, a long-felt need in the art has been to further reduce the size of power semiconductor devices still having increased breakdown voltages yet without substantially compromising the RON.